{"id":"OESA-2025-1587","summary":"microcode_ctl security update","details":"This is a tool to transform and deploy microcode update for x86 CPUs.\r\n\r\nSecurity Fix(es):\n\nImproper conditions check in some Intel(R) Xeon(R) processor memory controller configurations when using Intel(R) SGX may allow a privileged user to potentially enable escalation of privilege via local access.(CVE-2024-23918)","modified":"2025-09-03T06:31:11.271353Z","published":"2025-06-06T14:03:27Z","upstream":["CVE-2024-23918"],"database_specific":{"severity":"High"},"references":[{"type":"ADVISORY","url":"https://www.openeuler.org/zh/security/security-bulletins/detail/?id=openEuler-SA-2025-1587"},{"type":"ADVISORY","url":"https://nvd.nist.gov/vuln/detail/CVE-2024-23918"}],"affected":[{"package":{"name":"microcode_ctl","ecosystem":"openEuler:24.03-LTS","purl":"pkg:rpm/openEuler/microcode_ctl&distro=openEuler-24.03-LTS"},"ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"20250512-1.oe2403"}]}],"ecosystem_specific":{"x86_64":["microcode_ctl-20250512-1.oe2403.x86_64.rpm"],"src":["microcode_ctl-20250512-1.oe2403.src.rpm"]},"database_specific":{"source":"https://repo.openeuler.org/security/data/osv/OESA-2025-1587.json"}}],"schema_version":"1.7.3"}