{"id":"OESA-2023-1549","summary":"microcode_ctl security update","details":"This is a tool to transform and deploy microcode update for x86 CPUs.\n\nSecurity Fix(es):\n\nIncorrect default permissions in some memory controller configurations for some Intel(R) Xeon(R) Processors when using Intel(R) Software Guard Extensions which may allow a privileged user to potentially enable escalation of privilege via local access.(CVE-2022-33196)\n\nImproper isolation of shared resources in some Intel(R) Processors when using Intel(R) Software Guard Extensions may allow a privileged user to potentially enable information disclosure via local access.(CVE-2022-38090)\n\nInformation exposure through microarchitectural state after transient execution in certain vector execution units for some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access.(CVE-2022-40982)","modified":"2025-09-03T06:18:18.771023Z","published":"2023-08-26T11:05:46Z","upstream":["CVE-2022-33196","CVE-2022-38090","CVE-2022-40982"],"database_specific":{"severity":"Medium"},"references":[{"type":"ADVISORY","url":"https://www.openeuler.org/en/security/safety-bulletin/detail.html?id=openEuler-SA-2023-1549"},{"type":"ADVISORY","url":"https://nvd.nist.gov/vuln/detail/CVE-2022-33196"},{"type":"ADVISORY","url":"https://nvd.nist.gov/vuln/detail/CVE-2022-38090"},{"type":"ADVISORY","url":"https://nvd.nist.gov/vuln/detail/CVE-2022-40982"}],"affected":[{"package":{"name":"microcode_ctl","ecosystem":"openEuler:20.03-LTS-SP3","purl":"pkg:rpm/openEuler/microcode_ctl&distro=openEuler-20.03-LTS-SP3"},"ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"2.1-41.oe1"}]}],"ecosystem_specific":{"src":["microcode_ctl-2.1-41.oe1.src.rpm"],"x86_64":["microcode_ctl-2.1-41.oe1.x86_64.rpm"]},"database_specific":{"source":"https://repo.openeuler.org/security/data/osv/OESA-2023-1549.json"}}],"schema_version":"1.7.3"}