{"id":"CVE-2024-45817","details":"In x86's APIC (Advanced Programmable Interrupt Controller) architecture,\nerror conditions are reported in a status register.  Furthermore, the OS\ncan opt to receive an interrupt when a new error occurs.\n\nIt is possible to configure the error interrupt with an illegal vector,\nwhich generates an error when an error interrupt is raised.\n\nThis case causes Xen to recurse through vlapic_error().  The recursion\nitself is bounded; errors accumulate in the the status register and only\ngenerate an interrupt when a new status bit becomes set.\n\nHowever, the lock protecting this state in Xen will try to be taken\nrecursively, and deadlock.","modified":"2026-03-14T15:03:18.482486Z","published":"2024-09-25T11:15:12.277Z","related":["MGASA-2025-0270","SUSE-SU-2024:3421-1","SUSE-SU-2024:3422-1","SUSE-SU-2024:3423-1","SUSE-SU-2024:3424-1","SUSE-SU-2024:3432-1","SUSE-SU-2024:3586-1","SUSE-SU-2024:3980-1","SUSE-SU-2024:4073-1","SUSE-SU-2024:4163-1","openSUSE-SU-2024:14377-1"],"references":[{"type":"ADVISORY","url":"http://www.openwall.com/lists/oss-security/2024/09/24/1"},{"type":"FIX","url":"https://xenbits.xenproject.org/xsa/advisory-462.html"},{"type":"FIX","url":"http://xenbits.xen.org/xsa/advisory-462.html"}],"affected":[{"database_specific":{"unresolved_ranges":[{"events":[{"introduced":"4.5.0"}]}],"source":"https://storage.googleapis.com/cve-osv-conversion/osv-output/CVE-2024-45817.json"}}],"schema_version":"1.7.5","severity":[{"type":"CVSS_V3","score":"CVSS:3.1/AV:N/AC:L/PR:N/UI:N/S:U/C:L/I:L/A:L"}]}