{"id":"AZL-102216","summary":"CVE-2026-90124 affecting package kernel 6.6.150.1-1","details":"In the Linux kernel, the following vulnerability has been resolved:\n\nirqchip/renesas-rzg2l: Fix loss of interrupt\n\nrzg2l_clear_irq_int() and rzg2l_clear_tint_int() perform a\nread-modify-write on the ISCR/TSCR status registers to clear the bit\nfor the interrupt just handled. Since these registers are\nwrite-0-to-clear per bit, this is racy:\n\nIf another interrupt's status bit gets set between the read and the write,\nthat bit is written back as 0 by the software-constructed value, clearing\nan interrupt that hasn't been serviced yet and losing it.\n\nThis can be reproduced by triggering multiple interrupts at once, e.g.:\n\n  gpioset -c gpiochip0 355=0 353=0 328=0 352=0\n\nFix this by writing back only the bit being cleared, with all other bits\nset to 1, instead of read-modify-writing the whole register.  Since 1-bits\nare left unchanged by hardware, concurrently-set status bits for other\ninterrupts are preserved.","modified":"2026-09-19T05:33:49Z","published":"2026-09-17T17:17:04Z","upstream":["CVE-2026-90124"],"references":[{"type":"WEB","url":"https://nvd.nist.gov/vuln/detail/CVE-2026-90124"}],"affected":[{"package":{"name":"kernel","ecosystem":"Azure Linux:3","purl":"pkg:rpm/azure-linux/kernel"},"ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"last_affected":"6.6.150.1-1"}]}],"database_specific":{"source":"https://github.com/microsoft/AzureLinuxVulnerabilityData/blob/main/osv/AZL-102216.json"}}],"schema_version":"1.9.0"}